Key Features
A new exercise paradigm allows instructors to reconfigure the 600 exercises included in the book to easily generate new exercises and solutions of their own.
A CD provides a toolkit of simulators and compilers along with tutorials for using them as well as additional problems and solutions, and references.
Description
The classic textbook for computer systems analysis and design, Computer Organization and Design, has been thoroughly updated to provide a new focus on the revolutionary change taking place in industry today: the switch from uniprocessor to multicore microprocessors. This new emphasis on parallelism is supported by updates reflecting the newest technologies with examples highlighting the latest processor designs, benchmarking standards, languages and tools. As with previous editions, a MIPS processor is the core used to present the fundamentals of hardware technologies, assembly language, computer arithmetic, pipelining, memory hierarchies and I/O. Along with its increased coverage of parallelism, this new edition offers new content on Flash memory and virtual machines as well as a new and important appendix written by industry experts covering the emergence and importance of the modern GPU (graphics processing unit), the highly parallel, highly multithreaded multiprocessor optimized for visual computing.
Instructors looking for 3rd edition teaching materials should e-mail textbook@elsevier.com.
Readership
Professional digital system designers, programmers, application developers, and system software developers.
Undergraduate students in Computer Science, Computer Engineering and Electrical Engineering courses in Computer Organization, Computer Design, ranging from Sophomore required courses to Senior Electives
Contents
Computer Abstractions and Technology; Instructions: Language of the Computer; Arithmetic for Computers; Assessing and Understanding Performance; The Processor; Enhancing Performance with Pipelining; Large and Fast: Exploiting Memory Hierarchy; Storage, Networks and Other Peripherals; Multiprocessors and Clusters; Mapping Control to Hardware; A Survey of RISC Architectures for Desktop, Server, and Embedded Computers.
Author Information
By David A. Patterson, University of California, Berkeley, USA; and John L. Hennessy, Stanford University, Palo Alto, CA, USA
